This invention relates to gate and storage dielectrics of integrated circuit devices. More particularly, this invention relates to scalable gate and storage dielectric systems.
A dielectric is an insulating material capable of storing electric charge and associated energy by means of a shift in the relative positions of internally bound positive and negative charges known as charge dipoles. This shift is brought about by an external electric field. A dielectric system is a collaborating arrangement of materials including at least one dielectric material.
Dielectric systems are directly involved in the progress of microelectronic process technology. Successes in the manufacture of quality dielectric systems have done much to advance integrated circuit technology. Improved dielectric systems have traditionally resulted in significant increases in electronic device and system capabilities.
The quality of a dielectric system can be determined generally by a well-defined criteria. One criterion is the effective dielectric constant K of the system. The effective dielectric constant is dependent on the individual dielectric constants of the materials used in the system. A dielectric constant indicates the relative capacity, as compared to a vacuum where K=1, of the material to store charge. Thus, high dielectric constant materials advantageously produce dielectric systems with high capacity to store charge.
Another criterion is the scalability of the system. Scalability of a dielectric system refers to its physical size (i.e., its thickness, measured in nanometers, and area). In particular, the ability to minimize the size of the system is important. Note that a system""s thickness and area can each be scaled independently of the other. A dielectric system having a geometrically scalable thickness may allow higher charge storage capacity. A dielectric system having a geometrically scalable area may allow more transistors to be fabricated on a single integrated circuit chip, thus allowing increased functionality of that chip.
Additional criteria for determining the quality of a dielectric system are dielectric interface compatibility and high temperature structural stability. In order to produce a stable and reliable device, a dielectric must be chemically compatible with the semiconductor substrate or plate material with which the dielectric forms an interface. The substrate or plate material is usually silicon. In addition, the substrate and dielectric interface must remain stable over a range of temperatures.
Other criteria are a dielectric system""s ability to provide charge control and stoichiometric reproducibility at a substrate/dielectric or plate/dielectric interface. Uncontrollable bonding at an interface may decrease device reliability and cause inconsistent device characteristics from one device to another. Dangling atoms (i.e., atoms that have not formed bonds) from the dielectric material may contribute to an undesirable charge accumulation at the interface. Charge accumulation varying from device to device can lead to an undesirably varying threshold voltage from device to device. The threshold voltage can be defined as the minimum voltage applied to a gate electrode of a device that places the device in active mode of operation.
In addition, leakage characteristics of a dielectric material are particularly important when the dielectric material is used in scaled down devices. A thin gate dielectric often gives rise to an undesirable tunneling current between a gate and the substrate. Tunneling current results in wasted power and is particularly destructive in memory circuitry, in which capacitors coupled to a gate dielectric system may be undesirably discharged by the tunneling (i.e., leakage) current.
High temperature chemical passivity is also an important criterion of a dielectric system. A gate dopant may undesirably diffuse through a gate dielectric material during high temperature device fabrication, corrupting the substrate/dielectric or plate/dielectric interface. The dopant may form bonds with the dielectric material and the substrate or plate material causing an undesirable negative charge buildup at the interface. This negative charge may also result in an undesirable increase in the threshold voltage of the device.
Further, the quality of a dielectric system is also determined by its breakdown characteristics. A uniform dielectric breakdown characteristic across multiple dielectric systems is advantageous because breakdown of a single dielectric system in a device or circuit can cause undesirable and unpredictable device or circuit operation. Loosely defined, a dielectric breakdown occurs when a voltage applied to a dielectric system exceeds a breakdown voltage limit of the dielectric material as it is arranged in the system. Moreover, the breakdown of a storage dielectric can cause stored charge to undesirably dissipate. Thus, a uniform dielectric breakdown characteristic increases system functionality, reliability, and robustness.
Finally, the quality of a dielectric system is further determined by its ability to permit etch selectivity during fabrication. Etch selectivity refers to an ability to selectively remove material to leave behind a desired pattern. The desired pattern corresponds to the arrangement of materials in a system or device. A material that is not significantly etch selective may pose problems in the fabrication of that system or device, as the material may not permit structural integration with other materials of the device.
In an ongoing effort to develop improved dielectric systems, diligent research and experimentation have highlighted problematic dielectric system characteristics. Known limitations of traditional dielectric material silicon dioxide (SiO2), namely its low K value, high leakage characteristic resulting from increased scaling, and its high temperature chemical impassivity, show the need for improved dielectric materials and systems. Attempts to find improved dielectric materials and systems, as defined by the criteria described above, have had limited success. Particularly, attempts to develop a dielectric system that concurrently satisfies all of the above concerns and issues and that overcomes the limitations of SiO2 have been unsuccessful.
In view of the foregoing, it would be desirable to provide improved dielectric systems.
It would also be desirable to provide methods of fabricating improved dielectric systems.
It is an object of the present invention to provide improved dielectric systems.
It is also an object of the present invention to provide methods of fabricating improved dielectric systems.
Gate and storage dielectric systems of the present invention provide high effective K values. Improved gate and storage dielectric stacks include a high K dielectric material that produces improved device characteristics such as increased storage capacity and increased drive current. Additionally, the improved dielectric stacks include a passivated overlayer that maintains the high effective K values, is in addition to other desirable characteristics. For example, a silicon-rich-nitride passivated overlayer advantageously provides a stoichiometric interface between a dielectric and a substrate or storage plate. In addition, a silicon-rich-nitride passivated overlayer advantageously provides charge control and regulation of threshold voltage in metal-oxide-semiconductor field effect transistors (MOSFETs).
Methods of fabricating improved gate and storage dielectric systems are also provided by the present invention. A substrate or bottom storage plate is carefully prepared before subsequent deposition of metal or, in other embodiments, dielectric material. Metal or dielectric materials are deposited to minimize thickness and to maximize storage capacity. Increased storage capacity, which is also characteristic of high K materials, increases area scaling capabilities. Increased area scaling can reduce the integrated circuit chip area required to fabricate an integrated circuit device. Thus, either more devices can be fabricated on a single integrated circuit chip, advantageously allowing increased functionality, or more integrated circuit chips can be fabricated on a single wafer, advantageously reducing costs.
The passivated overlayer is deposited such that the resulting K value of the overlayer does not compromise the high K value of the dielectric used in the dielectric stack. Dielectric stacks may be appropriately annealed to provide greater stack stability.